IEEE 1284.3 and 1284.4
Advances in High-Speed Parallel Port Performance and Port Sharing

From it's humble beginnings as a Printer Port on the original IBM PC, the Parallel Port has become one of the most common connectors on the Personal Computer today. Virtually every PC shipped over the past 18 years has had a parallel port interface on it. Originally this port was used just for driving 'fast' dot matrix printers. Today the parallel port is used to interface to almost every PC peripheral in use. Printers, scanners, data acquisition, CD ROM, tape drives, high speed modems and digital cameras are some of the peripherals that can be purchased and used today.

From 1981 until 1994 there was tremendous growth in the power, performance and capabilities of the PC. Unfortunately there was very little change in the performance of the parallel port. In 1994 this all changed with the release of IEEE Std. 1284-1994. This standard defined new protocols and new interface models that would enable a 50 to 100x performance increase in the capabilities of the parallel port. With the efforts of the IEEE 1284.3 and 1284.4 committees these enhancements are continuing today.

This presentation will provide an introduction to the state and future of the parallel port interface and the associated protocol stack.

Prior to the 1284 standard the PC parallel port model was a simple register set that the host driver could access. In order to transfer data the host driver was required to access the register and manage all the handshaking and data transfer. Since the parallel port was mapped into the ISA bus I/O space the fastest the driver could access the port was 1Mbyte per second. With an overhead of 4 port accesses per data transfer this put a limit of 250Kbytes per second as the fastest the PC could transfer data using the Centronics printer protocol. It would require nearly 100% of the PC utilization in order to achieve this rate. In order to keep the PC responsive actual data rates were on the order of 50KB/S to 150KB/S.

The 1284 standard provided new data transfer protocols that could be implemented in an enhanced register model. One of the key advantages of this was that the register model could remain backward compatible with the existing model but add enhanced features for better data transfer. This was achieved by implementing hardware state machines that would offload the data transfer handshaking form the host driver. The Enhanced Parallel Port (EPP) and Extended Capabilities Port (ECP) are these advanced modes.
These modes enable data transfer rates of over 1MB/S with reduced host utilization on today's ISA ports, and 3-5MB/S on future PCI implementations.

Printing, reading or writing from tape, and other peripheral communication can consume a significant percentage of the parallel port bandwidth when active. In reality though, these activities do not occur very often and use very little of the overall available bandwidth. This means that a significant PC resource is being wasted. To use this additional potential the IEEE 1284.3 committee developed a protocol to allow sharing of the parallel port by multiple peripherals. The Daisy Chain protocol is the result of this effort.

Devices that adhere to this protocol (DC devices) have two connectors on them. One connector connects to the host port of the PC or the Pass Through port of another DC device. The other connector is the pass through port. This port replicates, or passes through the signals from the host port when the peripheral is not communicating with the host. The Daisy Chain protocol allows four peripherals to share a single parallel port and still attach an older 'legacy' peripheral. In this way, like the 1284 standard, backwards compatibility with the existing installed base is preserved.

The wire protocol that is used for 1284.3 is "out of band" to the 1284 defined protocols. This allows all DC devices to utilize the full capabilities of the 1284 standard. The 1284.3 protocol provides the means to address individual devices on the parallel port chain and to select a particular device for use by the host. When a DC device is selected the 'downstream' devices and the legacy device do not see any activity on the parallel port. To these devices the parallel port is idle.

One advantage of standardizing on the switching protocol is to enable the use of a common software driver on the host PC. The host driver, possibly provided by the Operating System, can then provide the switching services for the host application. The 1284.3 Service Provider Interface defines the types of services that are required by client applications. These services will be provided by the host.

This 1284.3 SPI is responsible for determining how many devices are attached to the parallel port and discovering what they are. This information is obtained by the 1284 device ID method for LPT plug and play. To the client application it appears that the DC device is the only device attached to the parallel port. The 1284.3 SPI driver manages the switching and selection of the peripheral.

Once you have a software layer to provide the basic port enumeration services it is a natural extension to include the data transfer functions. The 1284.3 Data Link interface defines these services. With a full software interface to the parallel port we are able to achieve independence from the actual hardware interface. This makes it easier to migrate to newer and faster hardware without effecting the client applications.

The 1284.3 Data Link defines a packet protocol that enables the delivery of packets of data to other side of the interface. This creates a connection-less, peer to peer relationship between the host and the peripheral. The header provides information on the data length and the transport protocol being used. This ensures that the data is only delivered to the appropriate client. The data length is used to enable DMA for the reception of data.

At this point the 1284/1284.3 protocol stack provides a software interface that is independent of the actual hardware implementation. With the appropriate implementation of the data link the parallel port could be used with many different transport protocols. Although this is true, there was no transport layer that could take advantage of the features of the 1284 interface. In particular the channel capabilities of the EPP and ECP modes.

The IEEE 1284.1 committee had defined a printer management standard that could operate over networks or direct attached interfaces. They requested that the IEEE develop a transport protocol that would take advantage of the 1284 standard parallel port capabilities but also be suitable for other physical interfaces. One of the main requirements was that the transport layer be able to maintain multiple conversations, or sessions, between the PC and the peripheral. In addition to this the protocol should ensure that one conversation cannot block another. An example of blocking is what you see in older Centronics interfaces. If the paper should run out of the printer or you open the tray to add more paper you can no longer communicate with the printer. With 1284.4 these functions should be independent and not effect one another.

The IEEE 1284.4 committee was established to develop and define this transport protocol. After analysis of various existing protocols, such as PPP and the MFP IS16550, it was determined that the Multiple Logical Channels (MLC) protocol developed by Hewlett-Packard and Genoa Technology met the general requirements for this standard. QualityLogic™ (formerly Genoa Technology) and HP offered this protocol as the basis for the 1284.4 standard. While MLC was the basis for 1284.4, the final standard is not backward compatible with MLC.

The 1284.4 protocol allows a device to carry on multiple, concurrent exchanges of data and/or control information with another device across a single point-to-point link. Blocking of one data exchange has no effect on the others. While the protocol was required to operate over the 1284 interface it may also operate over other interfaces such as USB and IEEE 1394.

1284.4 defines a packet protocol that enables this communication. Within the packet is the identity of the source and destination endpoints, client data, as well as control and credit information. Credit is the flow control method that is used to ensure that channel blocking does not occur.

With credit the target of a data transfer gives the source of the data an indication of how much data it is guaranteed to accept. In this way the source can never send more data than the target can accept. Upon initialization both sides negotiate for how much data needs to be transferred and in what packet sizes.

The source and target identities define a connection between the sides. A source may communicate with multiple target endpoints. In this way one client can communicate with multiple services on the target. A scanner is one example of how this may operate. The scanner application on the host may need to communicate with two functions on the scanner peripheral. The first function may be the scanner control and status monitor. The application will then establish a conversation between itself and this function on the scanner. At some point a page to be scanned may be inserted. Now the scanner can request the establishment of a connection between the scan engine and the host application. Now we have two independent conversations established between the PC and the peripheral.

This model can be extended to many different conversations. Conversations may occur between devices on different physical interfaces. The advantage of 1284.4 is that it can port to other PC related interfaces by the implementation of the appropriate software interface. This means that a client application on the PC can communicate with devices on multiple physical interfaces without any changes.

In conclusion, the parallel port is being enhanced by new hardware and software support. With backward compatibility and a huge installed base this interface will provide a convenient and powerful port for future peripherals. This presentation will provide an introduction to the protocol stack and issues involved in developing parallel port peripherals.

Click here to view a slide presentation of "Advances in High-Speed Parallel Port Performance and Port Sharing". This presentation was given by Larry Stein at the International IC Conference in Taipei, Taiwan in June of 1999.

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